The CD4046BD CMOS Micropower Phase-Locked Loop(PLL) consists of a low power,linear voltage-controlled oscillator (VCO) and two different phase comparators having a common signal-input amplifier and a common comparator input.A 5.2-V zener diode is provided for supply regulation of if necessary

? FM demodulator and modulator
? Frequency synthesis and multiplication
? Frequency discriminator
? Data synchronization
? Voltage-to-frequency conversion
? Tone decoding
? FSK-Modems
? Signal conditioning
? (SeeICAN-6101"RCA COS/MOS Phase-Locked Loop-A Versatile Building Block for Micropower Digital and Analog Applications"

? Very low power consumption:70μW(typ.)VCO fo=10kHz,VDD=5V
? Operating freguency range up to 1.4MHz(typ.)at VDD=10V,RI=5kΩ
? Low frequency drift:0.04%ρc(typ.)atVDD=10V
? Choice of two phase conparators: Exclusive-OR network(I)
Edge-controlled memory network with phase-pulse output for lock indication(II)
? High VCO linearity:<1%(typ.)at VDD=10V
? VCO inhibit control for on-off keying and ultra-low standby power consumption
? Source-follower output of VCO control input (Demod.output)
? Zener diode to assist supply regulation
? Standardized,symmetrical output characteristics
? 100% tested for quiescent current at 20V
? 5-V, 10-V and 15-V parametric ratings
? Meets all requirements of JEDEC Tentative Standards No. 13B, "Standard Specifications for Description of "B" Series CMOS Device's